Job OverviewWe are looking for an experienced AMS / HSIO Test Engineer with hands-on experience in high-speed interface validation and ATE testing.Candidate should have working experience in one or more of the following modules:DDR (Preferred)DisplayUSBPCIePLLIOSPECExperience on Advantest V93K (93K) tester is required.
Key ResponsibilitiesDevelop, debug, and maintain test programs on Advantest V93KPerform silicon validation and characterization for AMS / HSIO modulesDebug test failures and support yield improvement activitiesWork closely with design, validation, and product engineering teamsSupport production bring-up and manufacturing testing
RequirementsDegree in Electrical / Electronics Engineering or related fieldHands-on experience with Advantest V93K testerExperience in at least one HSIO domain (DDR / PCIe / USB / Display / PLL / IOSPEC)Experience in semiconductor test or validation environmentStrong debugging and analytical skills
PreferredDDR testing experienceAMS / mixed-signal validation experienceAutomation or scripting knowledge is a plus
Job ResponsibilitiesDevelop, debug, and bring up Scan ATPG test patterns on ATE platforms.Perform ATE test program development and validation during new product introduction (NPI).Debug scan test failures and analyze yield issues.Support pattern bring-up, correlation, and production release activities.Perform silicon characterization and electrical validation.Drive test time reduction and test optimization to improve manufacturing efficiency.Work closely with DFT, design, product, and validation teams to resolve test issues.Support failure analysis and root cause investigation for production problems.
RequirementsBachelor’s Degree in Electrical / Electronics / Computer Engineering or related field.Experience in ATE testing and semiconductor production environment.Hands-on experience with Scan / ATPG pattern debug or development.Familiar with tester platforms such as Teradyne, Advantest, or equivalent ATE systems.Understanding of digital testing concepts and semiconductor test flow.Good debugging and problem-solving skills.
Preferred / Bonus SkillsKnowledge of DFT (Design For Test) concepts:Scan architectureATPG flowBoundary scan / JTAGFault coverage analysisExperience with silicon bring-up or NPI activities.Scripting knowledge (Python, Perl, or similar) is an advantage.
About the role:
This role focuses on silicon characterization, test program correlation, and high-volume production release support for new semiconductor designs. You will collaborate closely with design, validation, and architecture teams to ensure complete test coverage, meet qualification timelines, and achieve yield and quality targets. You will also drive test time reduction, cost optimization, and continuous quality improvement initiatives.
KEY RESPONSIBILITIES:Collaborate with IP design, validation, and architecture teams for test content coverage, characterization planning, and qualification timeline alignment.Characterize new silicon designs and process technologies.Analyze test program correlation data before release for high volume production.Drive yield and quality goals; Identify test, yield, and quality improvement opportunities.Support cost reduction analyses for test time reduction or test removal.
PREFERRED EXPERIENCE:Proficient experience with data analysis tools such as JMP or Jupyter.Familiar with concepts surrounding wafer fabrication processes.Demonstrated experience in statistical analysis.Proficient in software programming and scripting languages. (SQL, C, C++, Java, Ruby, Perl, Python)Proficient in Windows, Unix, and Linux operating systems.Knowledgeable in modern computer architecture and semiconductor device physics.Hands-on experience with Scan and BIST architectures.
Job Title: AMS / HSIO Test Engineer (V93K)Job OverviewWe are looking for an experienced AMS / HSIO Test Engineer with hands-on experience in high-speed interface validation and ATE testing.Candidate should have working experience in one or more of the following modules:DDR (Preferred)DisplayUSBPCIePLLIOSPECExperience on Advantest V93K (93K) tester is required.
Key ResponsibilitiesDevelop, debug, and maintain test programs on Advantest V93KPerform silicon validation and characterization for AMS / HSIO modulesDebug test failures and support yield improvement activitiesWork closely with design, validation, and product engineering teamsSupport production bring-up and manufacturing testing
RequirementsDegree in Electrical / Electronics Engineering or related fieldHands-on experience with Advantest V93K testerExperience in at least one HSIO domain (DDR / PCIe / USB / Display / PLL / IOSPEC)Experience in semiconductor test or validation environmentStrong debugging and analytical skills
PreferredDDR testing experienceAMS / mixed-signal validation experienceAutomation or scripting knowledge is a plus
Product Development Engineer
KEY RESPONSIBILITIES:Collaborate with IP design, validation, and architecture teams for test content coverage, characterization planning, and qualification timeline alignmentCharacterize new silicon designs and process technologiesAnalyze test program correlation data before release for high volume productionDrive yield and quality goals; Identify test, yield, and quality improvement opportunitiesSupport cost reduction analyses for test time reduction or test removal
PREFERRED EXPERIENCE:Proficient experience with data analysis tools such as JMP or JupyterFamiliar with concepts surrounding wafer fabrication processesDemonstrated experience in statistical analysisProficient in software programming and scripting languages (SQL, C, C++, Java, Ruby, Perl, Python)Proficient in Windows, Unix, and Linux operating systemsKnowledgeable in modern computer architecture and semiconductor device physicsHands-on experience with Scan and BIST architectures
About the Role
We are looking for a skilled ATE Test Engineer to support the testing, validation, and qualification of CPU/GPU products and IPs. You will be responsible for pattern bring-up, test program development, yield and test time optimization, and post-manufacturing product support. The role requires close collaboration with design, package, quality, and manufacturing teams to ensure high product quality and reliability.
Responsibilities
Plan and execute pattern bring-up, on-chip characterization, yield attainment, and test time optimization plans.Develop, validate, and release ATE test programs.Provide DIB board design guidelines and support HW and content readiness.Support HTOL, package qualification, and OSAT qualification activities.Troubleshoot RMA issues with Quality teams to meet customer cycle time and drive DPPM improvements.Support manufacturing and post-manufacturing product life cycle activities.Cooperate with different teams to define the content of testing.
Qualifications
4–5+ years of relevant experience, preferably with CPU/GPU products/IPs.Hands-on experience with ATE testers (e.g., Verigy 93K), handlers, and test program development.Knowledge of Test IPs: Scan, MBIST, Functional, Analog-mixed signals, High-Speed I/O.Familiarity with digital testing concepts, DFT, and manufacturing test flows.Experience with statistical data analysis and post-manufacturing support.Proficient in Unix/Windows environments, scripting skills (Python, Perl, Java).Strong problem-solving skills, self-motivated, and team-oriented.
Preferred Skills
Experience in pattern debug, failure analysis, and ATE test flow development.Familiarity with Scan, Ethernet, Fuse, IOSPEC, JTAG, DDR, PCIe, PLL, RESET, Ring Osc., High Voltage Stress, Thermal, xGMI, and Functional testing.Experience with OSAT qualification for manufacturing testing.
Product Development Engineer/Test (ATE)
THE PERSON: Position involves test program development, characterization, data analysis, and silicon debug, preferably with experience in area of Test Program, Fuse and characterization program generation, hardware DIB design requirements, and support of IP level tests bring up in leading edge process technologies.
KEY RESPONSIBILITIES: • Test patterns & test flows development, debug, test and characterization• Experience skillsets include ATE Test Program development on Advantest 93K• Characterization and debug of new silicon designs and process technologies• Optimization of test coverage and flows for increased quality, yield, cost improvement,and test time reduction• Analysis of part failures leading to test coverage improvement• Analysis of characterization dataPREFERRED EXPERIENCE: • Good communication skills including data analysis and presentation• Unix and Windows proficiency and Java, Perl, Python scripting skills• ATE Test handling/ execution and development experience - Advantest V93K Smartest8 experience preferred.• Some IP knowledge, development and debug experience will be advantageWORKING HOURS: • Permanent night shift.ACADEMIC CREDENTIALS: • BS/MS EE or equivalent
Job OverviewWe are looking for an experienced AMS / HSIO Test Engineer with hands-on experience in high-speed interface validation and ATE testing.
Key ResponsibilitiesDevelop, debug, and maintain test programs on Advantest V93K.Perform silicon validation and characterization for AMS / HSIO modules.Debug test failures and support yield improvement activities.Work closely with design, validation, and product engineering teams.Support production bring-up and manufacturing testing.
RequirementsDegree in Electrical / Electronics Engineering or related field.Hands-on experience with Advantest V93K tester.Experience in at least one HSIO domain (DDR / PCIe / USB / Display / PLL / IOSPEC).Experience in semiconductor test or validation environment.Strong debugging and analytical skills.
PreferredDDR testing experience.AMS / mixed-signal validation experience.Automation or scripting knowledge is a plus.
KEY RESPONSIBILITIES: • Drive initiatives for final test yield enhancement, cycle time reduction, and quality improvement. • Support daily engineering debug activities. • Generate, organize and maintain documentation for product manufacturability. • Support lot-on-hold disposition based on sound technical judgement. • Produce yield and pareto reports per requirements. • Coordinate with internal Operations Team and External Subcons to facilitate testing and shipment of both NPI and Sustaining devices.
PREFERRED EXPERIENCE: • Experience in ATE Test patterns, flows, debug, and experience working in Product Engineering team. • Hands-on experience in ATE Test handling/execution and data analysis - Advantest T2K experience preferred (Advantest V93K experience is a plus). • Software programming and scripting proficiency (C++, Python). • Strong and effective presentation, written and verbal communication skills. • Excellent interpersonal, organizational, and analytical skills. • Years of Experience: 5
ACADEMIC CREDENTIALS: • Degree in Electrical/Electronics Engineering, or comparable disciplines
LOCATION: Singapore
KEY RESPONSIBILITIES: • Drive initiatives for final test yield enhancement, cycle time reduction, and quality improvement. • Support daily engineering debug activities. • Generate, organize and maintain documentation for product manufacturability. • Support lot-on-hold disposition based on sound technical judgement. • Produce yield and pareto reports per requirements. • Coordinate with internal Operations Team and External Subcons to facilitate testing and shipment of both NPI and Sustaining devices.
PREFERRED EXPERIENCE: • Experience in ATE Test patterns, flows, debug, and experience working in Product Engineering team. • Hands-on experience in ATE Test handling/execution and data analysis - Advantest T2K experience preferred (Advantest V93K experience is a plus). • Software programming and scripting proficiency (C++, Python). • Strong and effective presentation, written and verbal communication skills. • Excellent interpersonal, organizational, and analytical skills.
ACADEMIC CREDENTIALS: • Degree in Electrical/Electronics Engineering, or comparable disciplines
LOCATION: Singapore
