Responsibilities1. In-charge of failure analysis request from internal customers and external customers for customer returns, production/process rejects, and reliability/engineering evaluation failures.2. ASIC chip failure analysis3. MEMS chip failure analysis4. Provide technical suggestion based on MEMS/ASIC failure analysis to cross-functional teams such as chip R&D, production and qualification.
Requirement1. At least bachelor's degree or higher in Electrical/Eletronics Engineering, Semiconductor Engineering or related field.2. Knowledge of semiconductor devices (CMOS, Bipolar, IGBT etc) are required3. Knowledge of MEMS are required4. Have better understanding and knowledge of physical and electrical FA techniques, including EDX/SEM, SIMS, Obirch, EMMI etc electrical fault isolation.5. Ability to work independently including chip and microphone system testing6. Able to adapt to fast-paced work environments and possess the ability to complete tasks on time.7. Possess excellent problem-solving skills and a high level of attention to detail.8. Ability to communicate in Chinese with our internal team and external partners in China
JOB DESCRIPTION :• Mixed-signal subsystem design from design implementation to final delivery for chip-level integration• Perform micro-architectural studies to determine optimal hardware implementations of IP digital blocks to meet product requirements• Ensure all required documentation are prepared according to the quality standards• RTL logic design of modules using Verilog HDL. Designs may include power and clock management units, IIC, I2C, SoundWire digital interfaces, digital filters, etc• Prepare and hold design and verification reviews with technical staff throughout project lifecycle• Perform logic synthesis, timing and power analysis to optimise designs• Pre-silicon verification utilizing various methodologies such as constrained random verification with block/subsystem/chip level UVM test benches, spice co-simulation of mixed signal blocks and FPGA emulation.• Support Validation/bring-up of designs on silicon, providing support to cross-functional teams
JOB REQUIREMENTS :• Bachelor or Master degree in Electrical and Electronic Engineering with minimum 7+ years of professional experience in digital CMOS IC design• Experience using high-level modelling language/tool for designing and evaluating subsystems and algorithms• Strong understanding of digital design, preferably in IIC, I2S, SoundWire interface design• Experience with logic simulators for both RTL and gate-level simulation, design/waveform browsers, and power analysis tools, Verilog RTL design
Responsibilities:The Mixed-Signal IC (MEMS Interface) Design Engineer will be responsible for the design and development of capacitive and/or piezoelectric MEMS interface ASICs, including the required amplifiers, ADCs, filters and control logic, with characteristic high impedance inputs, ultra low power, low noise circuits etc .The responsibility of the Mixed-Signal IC Design Engineer includes scheduling, design, simulation and layout of mixed-signal circuit blocks, including pre- and post-silicon verification.It is also expected that you will conduct periodic design reviews, including with application engineers.It is also expected that you will support test development and product development teams in bringing projects to production.
Requirements:PhD/Master’s Degree in Electronics/Electrical Engineering.Minimum 6 years’ experience in Analog or Mixed-signal IC design.Very good knowledge of CMOS processes.Highly proficient in analog and mixed-signal IC design EDA tools.Experienced in analog and mixed-signal circuit designs, such as regulators, DC-DC converters, low-power, low-noise biasing circuits and amplifiers, sigma-delta modulation and ADCs, etcExperience in design of high resolution, low power sigma-delta modulation preferred.Experience in design of ultra low power ADC preferred.Skilled in laboratory testing of IC prototypes.Knowledge of Linux operating system required.Experience in MEMS interface ASIC design advantageous.
